master:shiftreg parametersPSCAD Serial-In/Serial-Out Shift Register
Every parameter of the PSCAD Serial-In/Serial-Out Shift Register (master:shiftreg): 12 names, with the unit, the default and the meaning PSCAD gives each one. Copy a name into parameters().
What master:shiftreg is
Serial-In/Serial-Out Shift Register (Interpolated Serial-In/Serial-Out Shift Register), a component of PSCAD's Master Library, filed under control blocks.
- Definition
master:shiftreg- PSCAD name
- Serial-In/Serial-Out Shift Register
- Category
- Control blocks
- Parameters
- 12, in 2 groups
- Read from
- PSCAD 5.0.0, 2026-11-07
Read and write master:shiftreg in Python
import mhi.pscad
pscad = mhi.pscad.connect() # the PSCAD that is open; launch() starts one
project = pscad.project("my_case") # a case loaded in the workspace
for comp in project.find_all("master:shiftreg"): # the exact definition, namespace first
params = comp.parameters() # every parameter, as PSCAD holds it
print(str(params["Clock"])) # Active Clock Edge
comp = project.find_all("master:shiftreg")[0]
comp.parameters(Clock="POSITIVE") # a Choice is written as its symbol
- A parameter is named exactly as in the table, letter case included:
parameters()gives every one of them in a dictionary, and a name the component does not have is refused. - A value that carries a unit comes back as a number whose unit is only in its text, so read it as text first (
str(...)) or the unit is lost. PSCAD keeps a written unit as it is given:"2500 [mohm]"stays in mohm. - A Choice is read and written as its symbol (the capitals in "Written as"), not as the words PSCAD shows in the dialog.
find_all()takes the exact definition only. A wildcard or a bare name withoutmaster:comes back empty; the Builder'spx_findwalks the pages for those.
The Builder's runtime does the same with the unit handled for you: px_get(comp, "Clock") and px_set(...), which also records the old value so the case is put back at the end. Getting started shows them.
Configuration
| Parameter | Unit | Default | Description |
|---|---|---|---|
ClockChoice | · | NEGATIVE | Active Clock EdgeSelect Positive or Negative edgeWritten as NEGATIVE (Negative [1->0]), POSITIVE (Positive [0->1]) |
INTRChoice | · | DISABLED | Interpolation CompatibilitySelect Enabled or DisabledWritten as DISABLED (Disabled), ENABLED (Enabled) |
NChoice | · | 2 | Number of BitsSelect between 2 and 8Written as 2 = 2, 3 = 3, 4 = 4, 5 = 5, 6 = 6, 7 = 7, 8 = 8 |
NameText | · | · | Name for IdentificationEnter a name for identification |
Initializations
| Parameter | Unit | Default | Description |
|---|---|---|---|
Q1Choice | · | LOW_0 | Initial State of Output 1Written as LOW_0 (Low [0]), HIGH_1 (High [1]) |
Q2Choice | · | LOW_0 | Initial State of Output 2Written as LOW_0 (Low [0]), HIGH_1 (High [1]) |
Q3Choice | · | LOW_0 | Initial State of Output 3Written as LOW_0 (Low [0]), HIGH_1 (High [1])Used when N>2 |
Q4Choice | · | LOW_0 | Initial State of Output 4Written as LOW_0 (Low [0]), HIGH_1 (High [1])Used when N>3 |
Q5Choice | · | LOW_0 | Initial State of Output 5Written as LOW_0 (Low [0]), HIGH_1 (High [1])Used when N>4 |
Q6Choice | · | LOW_0 | Initial State of Output 6Written as LOW_0 (Low [0]), HIGH_1 (High [1])Used when N>5 |
Q7Choice | · | LOW_0 | Initial State of Output 7Written as LOW_0 (Low [0]), HIGH_1 (High [1])Used when N>6 |
Q8Choice | · | LOW_0 | Initial State of Output 8Written as LOW_0 (Low [0]), HIGH_1 (High [1])Used when N>7 |
Related
← master:Sequencer_Wait Sequencer: Wait for an event · master:sign Sign Function →